简介
Advance Information
JPEG Codec Camera and video input port SD interface
256K Embedded Display SRAM Image Processor
CMOS
SSD1921 is an image processor designed for advanced mobile phone and handheld device with image capture and process features.
It offers camera or DVD input port, image processing unit and hardware JPEG codec to encode the captured image into JPEG file. The files can be saved into SD/MMC card through SD interface. The JPEG file is retrieved back from SD/MMC card, decoded and displayed on LCD panel through LCD interface. This interface supports various kinds of LCD panel like STN, CSTN and TFT.
The LCD controller of SSD1921 supports LCD panel for mobile phone with size, for example, 176x220 and 240x160 resolution at color depth 1, 2, 4, 8, 16 and 32 bit-per-pixel (bpp). For 16 and 32 bpp, SSD1921 provides 2D graphics acceleration features like virtual display, image rotation, cursor display, line drawing, BitBLT with raster operation, color fill, color expansion etc.
SSD1921 is able to interface different type of microcontrollers, for instance, XScale and Dragonball MX1 that are popular in handheld devices market. It also support indirect addressing mode which can minimize the pin count of control signals.
Internal PLLs is built such that only single clock is required for SSD1921 to generate clocks for blocks with various clock speed requirement.
With advanced power management design, SSD1921 is suitable for low power consumption and advanced image handheld applications like smartphones, PDA, photo viewer, gaming devices and MP3 players, etc. The SSD1921 is available in LQFP package.
The main features of the SSD1921 are as follows.
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Features
1. Camera input port
a. Digital signal input and format
- Support 8-bit YUV422 CCIR601, CCIR656
- Support progressive video signal only
- Capture still image size up to 2.0M pixel resolution
- Max input frame frequency: 30fps at 2.0M pixel resolution
b. Scaling
- Support fix size low quality decimation (1, 2, 4, 8, 16)
c. Image Preview
- Support cropping and decimation for preview up to QVGA (320×240) size
d. Color Conversion
- For JPEG encoding, only YUV input source is supported
- Fix YUV -> RGB color conversion implementation from YUV422 -> RGB565 and YUV422 -> RGB888 format (32-bit, including 8-bit alpha blending value)
- Y, U and V components can be adjusted to set brightness and contrast
2. Hardware JPEG Codec
a. Hardware codec to encode and decode JPEG image with variable size up to 1280×1024
b. JPEG Code is consisted of the following hardware module
- Discrete Cosine Transform (DCT) and Inverse Discrete Cosine Transform (iDCT)
- Quantization calculation with table downloadable by software
- Zigzag and run-length coding
- Huffman encoding and decoding with table downloadable by software
c. For viewing JPEG image on LCD panel, the JPEG decoder can decimate and crop the image such that the length is in multiple of 8.
3. 2D Graphic Engine
a. Screen panning and scrolling – virtual display mode
b. Image rotation including 0, 90, 180, 270 degree
c. Two cursors with three colors and transparency selection. Cursor blinking is available
d. Line drawing
e. Rectangle drawing
f. Ellipse drawing
g. Bit block transfer (BitBLT)
- Host to frame buffer
- Frame buffer to frame buffer
- Total 256 three-operand raster operations (ROP3) working with BitBLT
- Pattern BitBLT: Source image is repeatedly filled up destination block
- Stretch BitBLT: Stretch the source image to a destination larger or smaller than the source
- Color Expansion: Monochrome color is expanded to either background or foreground color.
- Color Conversion: Source color is converted between RGB and YUV to destination block -> YUV overlay RGB background / RGB overlay YVU background.
- Color Fill: Fill a rectangular block with a single color.
4. LCD Graphic Controller
a. Support 1, 2, 4, 8, 16 and 32 bit-per-pixel (bpp) color depth
b. In 32bpp mode, each pixel is consisted of 8-bit red, 8-bit green, 8-bit blue and 8-bit alpha channel for controlling the transparency of the image.
c. In 1, 2, 4, 8bpp mode, it can display still image and has no 2D graphic engine feature available.
d. Arbitrary image size supported up to horizontal resolution of 512.
5. LCD Panel Interface
a. Support the following type of LCD panels:
- Monochrome and color STN 4/8/12/16 bit interface
- TFT 9/12/18 bit interface
- 18 bit HR-TFT interface
- 8 bit Serial TFT interface
- 8 bit Delta panel with sub-pixel accuracy algorithm
b. For STN and CSTN panel, spatial and dynamic dithering is available to increase color depth
- 16 gray shades for each color component when applying frame rate control only
- 64 gray shades for each color component when applying frame rate control and dithering
c. LCD panel power on and off sequencing
6. Host MCU interface
a. Support the following MCU interface
- SRAM interface (e.g. generic ARM core type MCU)
- ISA interface for MCU like NEC MIPS
- SH-3, SH-4
- MC68K
- Dragonball EZ/VZ/SZ
- StrongARM/ XScale
- Dragonball MX1
- 8/16 bits 6800/8080 indirect addressing mode
b. Support synchronous and asynchronous interface communication
c. Memory mapped I/O
d. Big/Little endian support
7. MMC/SD Interface
- Compatible with “The Multimedia Card System Specification version 3.0”
- Compatible with “SD Memory Card Specification version 1.0” and “SDIO Card Specification version 1.0”
- Block transfer from/to external host
- Block transfer from/to internal memory
- Supports many SD functions including multiple I/O and combined I/O and memory
8. I/O Interface
- I2C master to control CMOS sensor
- 13 GPIO
9. Miscellaneous
- Embedded 256K bytes SRAM
- Single clock input
- Integrated PLL
- Advanced power management to cut off the power for modules that are idle.
10. Package
- 144-pin LQFP package
Ordering Information
| Ordering Part No. | SSD1921QL12 |
| Package | 144LQFP |
| Pad Pitch/Outer Lead Pitch | N/A |
| Ordering Part No. | Package | Pad Pitch/Outer Lead Pitch |
|---|---|---|
| SSD1921QL12 | 144LQFP | N/A |